Find and Hire Back End Development Freelancers in Bengaluru

Digital IP Design for ASIC & FPGA

$40/hr   ·   Starting at $2,000

**About Me** I have 20+ years of experience in ASIC/FPGA Design. While RTL coding (Verilog & VHDL), verification(Verilog,Cocotb), Synthesis and timing closure is my core skill, I have also worked exte…