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Engineering & Architecture

RTL Designer using verilog

$5/hr Starting at $25

Worked as an ASIC Digital Designer (Front end RTL Design) at QLogic India Pvt Ltd with almost 3 years of experience. Ownership of I2C and SMBus interfaces in multiple projects of storage based chips. Responsibilities included design and addition of new features, fixing RTL bugs, Lint-check, CDC ,timing analysis, ECOs, assisting in silicon debug, technical documentation and technical support.

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$5/hr Ongoing

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Worked as an ASIC Digital Designer (Front end RTL Design) at QLogic India Pvt Ltd with almost 3 years of experience. Ownership of I2C and SMBus interfaces in multiple projects of storage based chips. Responsibilities included design and addition of new features, fixing RTL bugs, Lint-check, CDC ,timing analysis, ECOs, assisting in silicon debug, technical documentation and technical support.

Skills & Expertise

AnalysisCDesignRtlTechnical DocumentationTechnical SupportVerilog

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