I have 9 years Verilog programming experience. I worked for Guzik Technical Enterprises during stay in Silicon Valley in 2012 year. Projects I took part in was connected to firmware development for data acuisition devices. Signal analysis algorithm implementation is usual task for me. I have strong understanding of such interconnection interfaces as AXI, Avalon MM/ST, HyperTransport. I have an experience for such interface controllers implementation for FPGA as DDR3/DDR4 memory, Ethernet and PCI-Express. I am experienced in RTL coding, area and speed algorithm optimizations.