Banner Image

All Services

Programming & Development

VLSI Design and verification engineer

$14/hr Starting at $25

ASIC/FPGA/SoC design and verificaion engineer skills; Digital design UVM SystemC System Verilog Verilog VHDL UNIX scripting PERL

About

$14/hr Ongoing

Download Resume

ASIC/FPGA/SoC design and verificaion engineer skills; Digital design UVM SystemC System Verilog Verilog VHDL UNIX scripting PERL

Skills & Expertise

C LanguageDesignDigital DesignSystemVerilogUnixUvmVerificationVerilogVLSI

0 Reviews

This Freelancer has not received any feedback.

Browse Similar Freelance Experts