As a Freelancer, I always study the project in depth to understand the requirements and feasibility before committing anything to a client. This way I always keep my promises fulfilled.
I am an RTL design engineer with very good exposure to the semiconductor industry. Currently working as IC design engineer at STMicroelectronics. I have been a freelancer for quite some time and completed a significant number of projects.
I pursue the following technical skills.
1. BE, MS with 6+ years of experience in RTL design and verification.
2. Worked on SoC and FPGA based designs
3. Proficient programming in Verilog, VHDL, SystemVerilog, and C.
4. Have good knowledge on Machine learning, bash, python, TTL and Matlab scripting.
5. Involved in all the phases of the project cycle starting from requirement collection, writing a functional specification, microarchitecture definition, RTL coding using VHDL/Verilog, functional verification using directed test cases, synthesis and (FPGA) implementation, static timing analysis (STA), onboard testing and integration.
6. Hands on experience in System co-design, RTL design, RTL Integration, Formal verification, Test bench development, Formal verification, simulation (Functional & Timing), synthesis, implementation, Timing closure, FPGA bring-up, Board testing and the EDA tools like Xilinx ISE & SDK, Quartus, Lattice diamond, Libero, Vivado, Code compositor studio, Synplify Pro, QuestaSim, Modelsim.
7.Software Development and debugging on ARM, Xilinx Zynq platforms
8. UVM based SoC verification.
9. Experience working with technologies and protocols such as 10/100 Mbps/1G Ethernet, PCIe, AXI, UART, I2C, SPI, DDR3, YUV, SDI & Wishbone.
10. Have used GIT and SVN version control in real projects.
11. Miscellaneous: MIPS, MATLAB, Linux, Logic analyzer, Oscilloscope.
I can work more than 25hrs a week and I expect at least 10$/hr.